Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays

Witterauf M, Tanase AP, Hannig F, Teich J (2016)

Publication Language: English

Publication Type: Conference contribution

Publication year: 2016

Conference Proceedings Title: Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)

Event location: London GB

Authors with CRIS profile

Michael Witterauf Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Alexandru-Petru Tanase Sonderforschungsbereich/Transregio 89 Invasives Rechnen Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

How to cite

APA:

Witterauf, M., Tanase, A.-P., Hannig, F., & Teich, J. (2016). Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays. In Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). London, GB.

MLA:

Witterauf, Michael, et al. "Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays." Proceedings of the IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), London 2016.

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