Reimann F, Lukasiewycz M, Glaß M, Haubelt C, Teich J (2011)
Publication Status: Published
Publication Type: Conference contribution, Conference Contribution
Publication year: 2011
Pages Range: 393-398
Article Number: 5981813
ISBN: 9781450306362
URI: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=80052678758&origin=inward
Stringent real-time constraints lead to complex search spaces containing only very few or even no valid implementations. Hence, while searching for a valid implementation a substantial amount of time is spent on timing analysis during system synthesis. This paper presents a novel system synthesis approach that efficiently prunes the search space in case real-time constraints are violated. For this purpose, the reason for a constraint violation is analyzed and a deduced encoding removes it permanently from the search space. Thus, the approach is capable of proving both the presence and absence of a correct implementation. The key benefit of the proposed approach stems from its integral support for real-time constraint checking. Its efficiency, however, results from the power of deduction techniques of state-of-the-art Boolean Satisfiability (SAT) solvers. Using a case study from the automotive domain, experiments show that the proposed system synthesis approach is able to find valid implementations where former approaches fail. Moreover, it is up to two orders of magnitude faster compared to a state-of-the-art approach. © 2011 ACM.
APA:
Reimann, F., Lukasiewycz, M., Glaß, M., Haubelt, C., & Teich, J. (2011). Symbolic system synthesis in the presence of stringent real-time constraints. In Proceedings of the 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011 (pp. 393-398). San Diego, CA, US.
MLA:
Reimann, Felix, et al. "Symbolic system synthesis in the presence of stringent real-time constraints." Proceedings of the 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011, San Diego, CA 2011. 393-398.
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