Electronic System-Level Synthesis Methodologies

Gerstlauer A, Haubelt C, Pimentel A, Stefanov T, Gajski D, Teich J (2009)

Publication Type: Journal article

Publication year: 2009


Publisher: Institute of Electrical and Electronics Engineers (IEEE)

Book Volume: 28

Pages Range: 1517-1530

Journal Issue: 10

DOI: 10.1109/TCAD.2009.2026356


With ever-increasing system complexities, all major semiconductor roadmaps have identified the need for moving to higher levels of abstraction in order to increase productivity in electronic system design. Most recently, many approaches and tools that claim to realize and support a design process at the so-called electronic system level (ESL) have emerged. However, faced with the vast complexity challenges, in most cases at best, only partial solutions are available. In this paper, we develop and propose a novel classification for ESL synthesis tools, and we will present six different academic approaches in this context. Based on these observations, we can identify such common principles and needs as they are leading toward and are ultimately required for a true ESL synthesis solution, covering the whole design process from specification to implementation for complete systems across hardware and software boundaries. © 2006 IEEE.

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Gerstlauer, A., Haubelt, C., Pimentel, A., Stefanov, T., Gajski, D., & Teich, J. (2009). Electronic System-Level Synthesis Methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(10), 1517-1530. https://dx.doi.org/10.1109/TCAD.2009.2026356


Gerstlauer, Andreas, et al. "Electronic System-Level Synthesis Methodologies." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28.10 (2009): 1517-1530.

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