Realization of a 5-stage Divider Circuitry in p-type Polymer Transistor Technology

Lackner C, Klauk H, Gut W, Halik M, Spilka R, Zschieschang U, Tanda A, Eder F, Rohde D, Ostermann T, Schmid G (2005)

Publication Language: English

Publication Type: Journal article, Report

Publication year: 2005

Journal

Technical Digest - International Electron Devices Meeting Institute of Electrical and Electronics Engineers

Pages Range: 113 - 116

URI: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=1609281

DOI: 10.1109/IEDM.2005.1609281

Authors with CRIS profile

Marcus Halik Professur für Werkstoffwissenschaften (Polymerwerkstoffe)

How to cite

APA:

Lackner, C., Klauk, H., Gut, W., Halik, M., Spilka, R., Zschieschang, U.,... Schmid, G. (2005). Realization of a 5-stage Divider Circuitry in p-type Polymer Transistor Technology. Technical Digest - International Electron Devices Meeting, 113 - 116. https://doi.org/10.1109/IEDM.2005.1609281

MLA:

Lackner, C., et al. "Realization of a 5-stage Divider Circuitry in p-type Polymer Transistor Technology." Technical Digest - International Electron Devices Meeting (2005): 113 - 116.

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