Analysis of the Settling Behavior of an External Reference Voltage Source for a 16 Bit and 200 MS/s Pipeline Analog-to-Digital Converter

Löhr R, Bender L, Röber J, Ohnhäuser F, Weigel R (2017)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2017

Event location: Batumi, Georgien GE

Abstract

High-Performance Analog to Digital Converter (ADC) have high requirements concerning the reference voltage source. In a small period of time the reference voltage has to settle with a high accuracy. Otherwise the linearity of the ADC degrades. In this paper the settling of an external reference voltage source is examined. Therefore optimization techniques for the signal path of the reference voltage are presented. This includes methods for reducing the external parasitic inductanceas well as design techniques for an enhanced settling curve. Under typical conditions, the achieved reference voltage source settles with an accuracy of 15 uV in less than halve a clock cycle for a 200 MS/s and 16 bits Pipeline ADC.

Authors with CRIS profile

Robert Löhr Lehrstuhl für Technische Elektronik (LTE) Robert Weigel Lehrstuhl für Technische Elektronik (LTE)

How to cite

APA:

Löhr, R., Bender, L., Röber, J., Ohnhäuser, F., & Weigel, R. (2017). Analysis of the Settling Behavior of an External Reference Voltage Source for a 16 Bit and 200 MS/s Pipeline Analog-to-Digital Converter. In Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS). Batumi, Georgien, GE.

MLA:

Löhr, Robert, et al. "Analysis of the Settling Behavior of an External Reference Voltage Source for a 16 Bit and 200 MS/s Pipeline Analog-to-Digital Converter." Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Batumi, Georgien 2017.

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