Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures

Wolinski C, Kuchcinski K, Teich J, Hannig F (2008)

Publication Type: Conference contribution

Publication year: 2008

Edited Volumes: Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08

Pages Range: 306-309

Conference Proceedings Title: Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines

Event location: Palo Alto, CA US

DOI: 10.1109/FCCM.2008.16

Abstract

In this paper, we present a constraint programmingbased approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processor elements as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly. © 2008 IEEE.

Authors with CRIS profile

Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Co-Design of Massively Parallel Embedded Processor Architectures (CoMap) Jan. 1, 2005 - Dec. 31, 2011 Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

Involved external institutions

Université de Rennes 1 / University of Rennes 1 FR France (FR)

How to cite

APA:

Wolinski, C., Kuchcinski, K., Teich, J., & Hannig, F. (2008). Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. In Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines (pp. 306-309). Palo Alto, CA, US.

MLA:

Wolinski, Christophe, et al. "Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures." Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Palo Alto, CA 2008. 306-309.

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