HIPAcc: A Domain-Specific Language and Compiler for Image Processing

Membarth R, Reiche O, Hannig F, Teich J, Körner M, Eckert W (2016)

Publication Language: English

Publication Type: Journal article

Publication year: 2016


Publisher: Institute of Electrical and Electronics Engineers (IEEE)

Book Volume: 27

Pages Range: 210-224

Journal Issue: 1

DOI: 10.1109/TPDS.2015.2394802


Domain-Specific Languages (DSLs) provide high-level and domain-specific abstractions that allow expressive and concise algorithm descriptions. Since the description in a DSL hides also the properties of the target hardware, DSLs are a promising path to target different parallel and heterogeneous hardware from the same algorithm description. In theory, the DSL description can capture all characteristics of the algorithm that are required to generate highly efficient parallel implementations. However, most frameworks do not make use of this knowledge and the performance cannot reach that of optimized library implementations. In this article, we present the HIPAcc framework, a DSL and source-to-source compiler for image processing. We show that domain knowledge can be captured in the language and that this knowledge enables us to generate tailored implementations for a given target architecture. Back ends for CUDA, OpenCL, and Renderscript allow us to target discrete Graphics Processing Units (GPUs) as well as mobile, embedded GPUs. Exploiting the captured domain knowledge, we can generate specialized algorithm variants that reach the maximal achievable performance due to the peak memory bandwidth. These implementations outperform state-of-the-art domain-specific languages and libraries significantly.

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Membarth, R., Reiche, O., Hannig, F., Teich, J., Körner, M., & Eckert, W. (2016). HIPAcc: A Domain-Specific Language and Compiler for Image Processing. IEEE Transactions on Parallel and Distributed Systems, 27(1), 210-224. https://dx.doi.org/10.1109/TPDS.2015.2394802


Membarth, Richard, et al. "HIPAcc: A Domain-Specific Language and Compiler for Image Processing." IEEE Transactions on Parallel and Distributed Systems 27.1 (2016): 210-224.

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