A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems

Bobda C (2003)

Publication Type: Conference contribution

Publication year: 2003

Edited Volumes: Proceedings -Design, Automation and Test in Europe, DATE

Series: A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems

Pages Range: 1130-1131

Conference Proceedings Title: Proceedings of Design, Automation and Test in Europe

Event location: Munich DE

DOI: 10.1109/DATE.2003.1253767

Abstract

The presented architecture has the peculiar feature of being self-timed and comprising a fully interlocked pipelining structure which aims at controlling the different computational paths of a system design. One example is the automotive industry where performance, space, cost, size, and weight are of vital importance, the main features of this architecture. © 2003 IEEE.

How to cite

APA:

Bobda, C. (2003). A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems. In Proceedings of Design, Automation and Test in Europe (pp. 1130-1131). Munich, DE.

MLA:

Bobda, Christophe. "A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems." Proceedings of the Design, Automation and Test in Europe (DATE 2003),, Munich 2003. 1130-1131.

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