A 20-Gbps Low Jitter Analog Clock Recovery Circuit for Ultra Wide Band Radio Systems

Hamouda M, Fischer G, Weigel R, Ußmüller T (2014)

Publication Type: Conference contribution

Publication year: 2014

Publisher: IEEE

Pages Range: 1516-1519

Event location: Melbourne AU

DOI: 10.1109/ISCAS.2014.6865435

Authors with CRIS profile

Mohammed Hamouda Lehrstuhl für Technische Elektronik Georg Fischer Professur für Technische Elektronik Robert Weigel Lehrstuhl für Technische Elektronik Thomas Ußmüller Lehrstuhl für Technische Elektronik

How to cite

APA:

Hamouda, M., Fischer, G., Weigel, R., & Ußmüller, T. (2014). A 20-Gbps Low Jitter Analog Clock Recovery Circuit for Ultra Wide Band Radio Systems. In Proceedings of the IEEE International Symposium on Circuits and Systems (pp. 1516-1519). Melbourne, AU: IEEE.

MLA:

Hamouda, Mohammed, et al. "A 20-Gbps Low Jitter Analog Clock Recovery Circuit for Ultra Wide Band Radio Systems." Proceedings of the IEEE International Symposium on Circuits and Systems, Melbourne IEEE, 2014. 1516-1519.

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