Co-Design of Massively Parallel Embedded Processor Architectures (CoMap)

Third party funded individual grant

Acronym: CoMap

Start date : 01.01.2005

End date : 31.12.2011

Website: https://www.cs12.tf.fau.de/forschung/projekte/comap

Overview

Publications

(47)

Communication-conscious Mapping of Regular Nested Loop Programs onto Massively Parallel Processor Arrays (2006) Hannig F, Merker R, Siegel S, Teich J Conference contribution A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing (2006) Dutta H, Hannig F, Heigl B, Hornegger H, Teich J Conference contribution A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template (2006) Kissler D, Hannig F, Kupriyanov O, Teich J Conference contribution A highly parameterizable parallel processor array architecture (2006) Kissler D, Kupriyanov O, Hannig F, Teich J Conference contribution, Conference Contribution Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays -- Architectural Parameters and Methodology (2006) Hannig F, Dutta H, Teich J Journal article A Generic Framework for Rapid Prototyping of System-on-Chip Designs (2006) Kissler D, Kupriyanov O, Hannig F, Koch D, Teich J Conference contribution An Architecture Description Language for Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Schaffer R, Merker R Conference contribution Modeling of Interconnection Networks in Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Lallet J, Sentieys O, Pillement S Other publication type Automatic FIR Filter Generation for FPGAs (2005) Dutta H, Hannig F, Teich J Conference contribution Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures (2005) Dutta H, Hannig F, Teich J Other publication type

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