Software-controlled consistency and coherence for many-core processor architectures (COKE)
Third party funded individual grant
Acronym: COKE
Start date : 01.09.2012
End date : 31.03.2021
Project details
Short description
Scientific Abstract
The achievable computing capacity of
individual processors currently strikes at its technological boundary
line. Further improvement in performance is attainable only by the use
of many computation cores. While processor architectures of up to 16
cores mark the topical state of the art in commercially available
products, here and there systems of 100 computing cores are already
obtainable. Architectures exceeding thousand computation cores are to be
expected in the future. For better scalability, extremely powerful
communication networks are integrated in these processors (network on
chip, NoC), so that they combine de facto properties of a distributed
system with those of a NUMA system. The extremely low latency and high
bandwidth of those networks opens up the possibility to migrate methods
of replication and consistency preservation from hardware into operating
and run-time systems and, thus, to flexibly counteract notorious
problems such as false sharing of memory cells, cache-line thrashing,
and bottlenecks in memory bandwidth.
Therefore, the goal of the
project is to firstly design a minimal, event-driven consistency kernel
(COKE) for such many-core processors that provides the relevant
elementary operations for software-controlled consistency preservation
protocols for higher levels. On the basis of this kernel, diverse
"consistency machines" will be designed, which facilitate different
memory semantics for software- and page-based shared memory.
Involved:
Wolfgang Schröder-Preikschat
Project Leader
Gabor Drescher
Project Member
Stefan Reif
Project Member
Timo Hönig
Project Member
