Steffen Vaas

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design (2021) Vaas S, Ulbrich P, Eichler C, Wägemann P, Reichenbach M, Fey D Conference contribution, Conference Contribution Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications (2019) Häublein K, Brückner W, Vaas S, Rachuj S, Reichenbach M, Fey D Conference contribution Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems (2019) Bauer W, Holzinger P, Reichenbach M, Vaas S, Hartke P, Fey D Conference contribution Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands (2019) Vaas S, Ulbrich P, Reichenbach M, Fey D Journal article, Original article Autonomous Driving in the Curriculum of Computer Architecture (2018) Rachuj S, Reichenbach M, Vaas S, Fey D Conference contribution, Conference Contribution Comparison of Lane Detection Algorithms for ADAS using Embedded Hardware Architectures (2018) Reichenbach M, Liebischer L, Vaas S, Fey D Conference contribution The Best of Both: High-performance and Deterministic Real-Time Executive by Application-Specific Multi-Core SoCs (2017) Vaas S, Ulbrich P, Reichenbach M, Fey D Conference contribution, Original article System on Chip Generation for Multi-Sensor and Sensor Fusion Applications (2017) Lieske T, Pfundt B, Vaas S, Reichenbach M, Fey D Conference contribution The R2-D2 Toolchain - Automated Porting of Safety-Critical Applications to FPGAs (2016) Vaas S, Reichenbach M, Margull U, Fey D Conference contribution An Application-Specific Instruction Set Processor for Power Quality Monitoring (2016) Vaas S, Reichenbach M, Fey D Conference contribution