Dr.-Ing. Alexandru-Petru Tanase

Sonderforschungsbereich/Transregio 89 Invasives Rechnen Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Symbolic inner loop parallelisation for massively parallel processor arrays (2014) Tanase AP, Witterauf M, Teich J, Hannig F Conference contribution, Conference Contribution Symbolic Mapping of Loop Programs onto Processor Arrays (2014) Teich J, Tanase AP, Hannig F Book chapter / Article in edited volumes Massively Parallel Processor Architectures for Resource-aware Computing (2014) Lari V, Tanase AP, Hannig F, Teich J Conference contribution Domain-Specific Augmentations for High-Level Synthesis (2014) Schmid M, Tanase AP, Hannig F, Teich J, Bhadouria VS, Ghoshal D Conference contribution Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach (2014) Hannig F, Lari V, Boppu S, Tanase AP, Reiche O Journal article High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model (2014) Schmid M, Hannig F, Tanase AP, Teich J Book chapter / Article in edited volumes Symbolic Parallelization of Loop Programs for Massively Parallel Processor Arrays (2013) Teich J, Tanase AP, Hannig F Conference contribution Accuracy and Performance Analysis of Harris Corner Computation on Tightly-Coupled Processor Arrays (2013) Sousa É, Tanase AP, Hannig F, Teich J Conference contribution Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays (2013) Sousa É, Tanase AP, Lari V, Hannig F, Teich J, Paul J, Stechele W, et al. Conference contribution A Prototype of an Adaptive Computer Vision Algorithm on MPSoC Architecture (2013) Sousa É, Tanase AP, Hannig F, Teich J Conference contribution