Prof. Dr.-Ing. Dietmar Fey

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs (2018) Lieske T, Biglari M, Fey D Conference contribution, Original article Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor (2018) Rachuj S, Bauer W, Fey D Conference contribution Case Study on Memristor-Based Multilevel Memories (2018) Söll C, Reichenbach M, Röber J, Hagelauer AM, Weigel R, Fey D Journal article, Original article Towards Virtual Hardware Prototyping for Generated Geometric Multigrid Solvers (2017) Kuckuk S, Leitenmaier L, Schmitt C, Schönwetter D, Köstler H, Fey D Other publication type The Best of Both: High-performance and Deterministic Real-Time Executive by Application-Specific Multi-Core SoCs (2017) Vaas S, Ulbrich P, Reichenbach M, Fey D Conference contribution, Original article Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors (2017) Hofmann J, Fey D, Riedmann M, Eitzinger J, Hager G, Wellein G Journal article A Non-Volatile Flip-Flop Using Memristive Voltage Divider (2017) Biglari M, Fey D Conference contribution, Abstract of a poster Memory Analysis and Performance Modeling for HPC Applications on Embedded Hardware via Instruction Accurate Simulation (2017) Ditter A, Schönwetter D, Kuzmin A, Fey D, Aizinger V Conference contribution, Conference Contribution Fe2vCl2: From Bare Metal to High Performance Computing on Virtual Clusters and Cloud Infrastructure (2017) Ditter A, Graf G, Fey D Conference contribution, Conference Contribution Comprehensive curriculum for reconfigurable heterogeneous computer architecture education (2017) Pfundt B, Reichenbach M, Fey D Journal article