Andreas Becher

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs (2018) Echavarria Gutiérrez JA, Schütz K, Becher A, Wildermann S, Teich J Conference contribution, Original article Optimistic Regular Expression Matching on FPGAs for Near-Data Processing (2018) Becher A, Wildermann S, Teich J Conference contribution, Conference Contribution Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics (2017) Pirkl J, Becher A, Echavarria Gutiérrez JA, Teich J, Wildermann S Conference contribution FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs (2016) Echavarria Gutiérrez JA, Wildermann S, Becher A, Teich J, Ziener D Conference contribution, Original article A LUT-Based Approximate Adder (2016) Becher A, Echavarria Gutiérrez JA, Ziener D, Wildermann S, Teich J Conference contribution ReOrder: Runtime Datapath Generation for High-Throughput Multi-Stream Processing (2016) Becher A, Wildermann S, Mühlenthaler M, Teich J Conference contribution Hybrid Energy-Aware Reconfiguration Management on Xilinx Zynq SoCs (2016) Becher A, Pirkl J, Herrmann A, Teich J, Wildermann S Conference contribution FPGA-Based Dynamically Reconfigurable SQL Query Processing (2016) Ziener D, Weber H, Vogt JS, Schürfeld U, Meyer-Wegener K, Teich J, Dennl C, et al. Journal article FPGA-Based Dynamically Reconfigurable SQL Query Processing (2015) Ziener D, Bauer F, Becher A, Dennl C, Meyer-Wegener K, Schürfeld U, Teich J, et al. Journal article A co-design approach for accelerated SQL query processing via FPGA-based data filtering (2015) Becher A, Ziener D, Meyer-Wegener K, Teich J Conference contribution, Conference Contribution