Lehrstuhl für Technische Elektronik (LTE)

A New BIST Scheme for the DAC SNDR Testing of an Audio Chip. (2003) Li H, Eckmüller J, Russo M, Sattler S, Eichfeld H, Weigel R Conference contribution Fast and accurate ramp generation with a PLL-stabilized 24-GHz SiGe VCO for FMCW and FSCW applications (2003) Stelzer A, Ettinger K, Höftberger J, Fenk J, Weigel R Conference contribution Integrated adaptive LO leakage cancellation for W-CDMA direct upconversion transmitters (2003) Lanschützer C, Springer A, Maurer L, Boos Z, Weigel R Conference contribution A Comparison of CPW-to-CPS Fed Ultra Wideband Antennas (2003) Oßberger G, Buchegger T, Stelzer A, Diskus C, Weigel R Conference contribution A 10 mW, 4 GHz CMOS Phase-Locked Loop with Dual-Mode Tuning Technique and Partly Integrated Loop Filter (2003) Konstanznig G, Weigel R Conference contribution A Low Noise Vector Modulator with integrated Basebandfilter in 120 nm CMOS technology (2003) Simon M, Weigel R Conference contribution Equivalent Circuit Modeling Using Frequency-Domain Subspace System Identification (2003) Neumayer R, Stelzer A, Weigel R Conference contribution Package Modeling Using Subspace Identification Algorithms (2003) Neumayer R, Stelzer A, Eurskens W, Weigel R Conference contribution A Low Power 4.3 GHz Phase-Locked Loop with Advanced Dual-Mode Tuning Technique Including I/Q-Signal Generation in 0.12 um Standard CMOS (2003) Konstanznig G, Springer A, Weigel R Conference contribution A Novel BIST Technique for SNR DAC Testing. (2003) Li H, Eckmüller J, Sattler S, Eichfeld H, Weigel R Conference contribution