Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10 (2011) Hannig F, Roloff S, Snelting G, Teich J, Zwinkau A Conference contribution Efficient Evaluation of Power/Area/Latency Design Trade-offs for Coarse-Grained Reconfigurable Processor Arrays (2011) Kissler D, Hannig F, Teich J Journal article A Flexible Smart Camera System based on a Partially Reconfigurable Dynamic FPGA-SoC (2011) Ziener D, Wildermann S, Oetken A, Weichslgartner A, Teich J Conference contribution A fault-tolerant, dynamically scheduled pipeline structure for chip multiprocessors (2011) Aliee H, Zarandi HR Conference contribution An efficient, dynamically adaptive method to tolerate transient faults in multi-core systems (2011) Aliee H, Zarandi HR Conference contribution, Conference Contribution Automatic generation of system-level virtual prototypes from streaming application models (2011) Kutzer P, Gladigau J, Haubelt C, Teich J Conference contribution, Conference Contribution Proceedings of the 22nd IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (2011) Cavallaro JR, Ercegovac MD, Hannig F, Ienne P, Swartzlander Jr. EE, Tenca AF Edited Volume Scalable Many-Domain Power Gating in Coarse-grained Reconfigurable Processor Arrays (2011) Kissler D, Gran D, Salcic Z, Hannig F, Teich J Journal article A Co-Simulation Approach for Control Performance Analysis during Design Space Exploration of Cyber-Physical Systems (2011) Mühleis N, Glaß M, Zhang L, Teich J Conference contribution Stress-Aware Module Placement on Reconfigurable Devices (2011) Angermeier J, Ziener D, Glaß M, Teich J Conference contribution