Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

SAS - A Framework for Symmetry-based Approximate Synthesis (2024) Jungnitz N, Keszöcze O Conference contribution, Original article ALPACA: An Accelerator Chip for Nested Loop Programs (2024) Walter D, Brand M, Heidorn C, Witterauf M, Hannig F, Teich J Conference contribution, Conference Contribution OpTC -- A Toolchain for Deployment of Neural Networks on AURIX TC3xx Microcontrollers (2024) Heidorn C, Hannig F, Riedelbauch D, Strohmeyer C, Teich J Other publication type Hardware-Aware Evolutionary Explainable Filter Pruning for Convolutional Neural Networks (2024) Heidorn C, Sabih M, Meyerhöfer N, Schinabeck C, Teich J, Hannig F Journal article ABACUS: ASIP-based Avro Schema-customizable Parser Acceleration on FPGAs (2024) Hahn T, Schüll D, Wildermann S, Teich J Conference contribution, Conference Contribution CRESTS: Chronology-based Reconstruction for Side-Channel Trace Segmentation for XTS-AES on Complex Targets (2024) Krüger P, Wildermann S, Teich J Conference contribution, Conference Contribution Exploring Multi-Reader Buffers and Channel Placement during Dataflow Network Mapping to Heterogeneous Many-core Systems (2024) Letras M, Falk J, Teich J Journal article, Online publication Fifth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2024) (2024) Meumeu Yomsi P, Wildermann S Edited Volume Accelerating DNNs using Weight Clustering on RISC-V Custom Functional Units (2024) Sabih M, Sesli B, Hannig F, Teich J Conference contribution, Conference Contribution SNN vs. CNN Implementations on FPGAs: An Empirical Evaluation (2024) Plagwitz P, Hannig F, Teich J, Keszöcze O Conference contribution, Original article