Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead

Ahmadinia A, Teich J (2003)

Publication Type: Conference contribution

Publication year: 2003

Series: Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead

Pages Range: 118-122

Conference Proceedings Title: Proceedings of the IFIP International Conference on VLSI-SOC

Event location: Darmstadt DE

Authors with CRIS profile

Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Optimization methodologies for reconfiguration management on reconfigurable hardware nodes (ReCoNodes) SPP 1148: Rekonfigurierbare Rechensysteme June 1, 2003 - May 31, 2009

How to cite

APA:

Ahmadinia, A., & Teich, J. (2003). Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead. In Proceedings of the IFIP International Conference on VLSI-SOC (pp. 118-122). Darmstadt, DE.

MLA:

Ahmadinia, Ali, and Jürgen Teich. "Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead." Proceedings of the IFIP International Conference on VLSI-SOC,, Darmstadt 2003. 118-122.

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