Dataflow Optimization for Programmable Embedded Image Preprocessing Accelerators

Lieske T, Reichenbach M, Ringlein B, Fey D (2016)

Publication Type: Conference contribution, Conference Contribution

Publication year: 2016

Publisher: Institute of Electrical and Electronics Engineers Inc.

Edited Volumes: 2016 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2016

Pages Range: 1-8

Conference Proceedings Title: Proceedings of ReConFig' 16

Event location: Cancun, Mexico

ISBN: 9781509037070

URI: http://ieeexplore.ieee.org/document/7857161/

DOI: 10.1109/ReConFig.2016.7857161

Authors with CRIS profile

Tobias Lieske Lehrstuhl für Informatik 3 (Rechnerarchitektur) Marc Reichenbach Lehrstuhl für Informatik 3 (Rechnerarchitektur) Dietmar Fey Lehrstuhl für Informatik 3 (Rechnerarchitektur)

How to cite

APA:

Lieske, T., Reichenbach, M., Ringlein, B., & Fey, D. (2016). Dataflow Optimization for Programmable Embedded Image Preprocessing Accelerators. In Proceedings of ReConFig' 16 (pp. 1-8). Cancun, Mexico: Institute of Electrical and Electronics Engineers Inc..

MLA:

Lieske, Tobias, et al. "Dataflow Optimization for Programmable Embedded Image Preprocessing Accelerators." Proceedings of the 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, Mexico Institute of Electrical and Electronics Engineers Inc., 2016. 1-8.

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