Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures

Dutta H, Hannig F, Teich J (2005)

Publication Type: Other publication type

Publication year: 2005

Edited Volumes: Technical Report 03-2005

Authors with CRIS profile

Hritam Dutta Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Co-Design of Massively Parallel Embedded Processor Architectures (CoMap) Jan. 1, 2005 - Dec. 31, 2011 Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

How to cite

APA:

Dutta, H., Hannig, F., & Teich, J. (2005). Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures.

MLA:

Dutta, Hritam, Frank Hannig, and Jürgen Teich. Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures. 2005.

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