Massively Parallel Processor Architectures: A Co-design Approach

Dutta H, Hannig F, Kupriyanov O, Kissler D, Teich J, Schaffer R, Siegel S, Merker R, Pottier B (2007)

Publication Type: Conference contribution

Publication year: 2007

Pages Range: 61-68

Conference Proceedings Title: Proceedings of the 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC)

Event location: Montpellier FR

Authors with CRIS profile

Hritam Dutta Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Co-Design of Massively Parallel Embedded Processor Architectures (CoMap) Jan. 1, 2005 - Dec. 31, 2011 Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

How to cite

APA:

Dutta, H., Hannig, F., Kupriyanov, O., Kissler, D., Teich, J., Schaffer, R.,... Pottier, B. (2007). Massively Parallel Processor Architectures: A Co-design Approach. In Proceedings of the 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC) (pp. 61-68). Montpellier, FR.

MLA:

Dutta, Hritam, et al. "Massively Parallel Processor Architectures: A Co-design Approach." Proceedings of the 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC), Montpellier 2007. 61-68.

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