Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System

Bobda C (2003)


Publication Type: Conference contribution

Publication year: 2003

Edited Volumes: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms

Series: Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System

Pages Range: 147-153

Conference Proceedings Title: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)

Event location: Las Vegas, Nevada

Abstract

Static FPGA (Field Programmable Gate Arrays) designs are efficient for data flow oriented applications while they are inefficient for control flow. We show that partial dynamic reconfigured designs can be more efficient than static designs, if the application contains exclusive coarse grain sections. Our case study is a multi-controller system, where various controller modules are exchanged during runtime depending on the operating regime of the controlled system. We present a multi-controller architecture as embedded system based on reconfigurable hardware. Portions of the FPGA design are exchanged during runtime to load new controller modules while other portions containing basic operational functions are static. We implemented a proto-type to proof the concept and discuss the results.

How to cite

APA:

Bobda, C. (2003). Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System. In Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA) (pp. 147-153). Las Vegas, Nevada.

MLA:

Bobda, Christophe. "Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System." Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA),, Las Vegas, Nevada 2003. 147-153.

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