Ensuring FPGA Reconfiguration in Space

Glein R, Rittner F, Hofmann A (2013)

Publication Language: English

Publication Type: Other publication type

Publication year: 2013

Edited Volumes: Xcell Journal

Pages Range: 23-27

Journal Issue: 84

Open Access Link: http://www.xilinx.com/publications/archives/xcell/Xcell84.pdf

Abstract

The reconfiguration of the digital hardware structure is an essential part of modern FPGA-based on-board processors, in order to assure system flexibility. We use a state-of-the-art configuration method to configure the FPGAs of the target platform by an external logic. A failure of this external logic is a single-point-of-failure. Therefore, we introduce a fail-safe initial configuration, which enables self-reconfiguration of the FPGAs by partial reconfiguration. This fail-safe reconfiguration reduces the dependency on external configuration logic.
The major advantage is the increase in system reliability regarding the main challenge of FPGA reconfiguration. This possibility arises due to the coexistence of both configuration methods.
We implemented and demonstrated this configuration concept on an elegant bread board.

Authors with CRIS profile

Robert Glein Lehrstuhl für Informationstechnik mit dem Schwerpunkt Kommunikationselektronik (Stiftungslehrstuhl) Florian Rittner Lehrstuhl für Informationstechnik mit dem Schwerpunkt Kommunikationselektronik (Stiftungslehrstuhl)

Involved external institutions

Fraunhofer-Institut für Integrierte Schaltungen (IIS) DE Germany (DE)

How to cite

APA:

Glein, R., Rittner, F., & Hofmann, A. (2013). Ensuring FPGA Reconfiguration in Space.

MLA:

Glein, Robert, Florian Rittner, and Alexander Hofmann. Ensuring FPGA Reconfiguration in Space. 2013.

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