Energy-efficient Query Processing by Adaptive Dynamic Reconfiguration of FPGA-based, Heterogeneous Accelerator Systems

Internally funded project


Start date : 01.10.2014

End date : 31.12.2016

Project details

Short description

While CPUs and FPGAs have different strength in terms of power consumption and processing speed, in this project, we want to provide tightly coupled, easy to use accelerator systems which benefit both from the strength of FPGAs and CPUs. To achieve this goal, we study the bottlenecks of each architecture and develop and apply techniques for adaptive optimization of the resulting accelerator systems using partial reconfiguration.

Scientific Abstract

While CPUs and FPGAs have different strength in terms of power consumption and processing speed, in this project, we want to provide tightly coupled, easy to use accelerator systems which benefit both from the strength of FPGAs and CPUs. To achieve this goal, we study the bottlenecks of each architecture and develop and apply techniques for adaptive optimization of the resulting accelerator systems using partial reconfiguration.

Involved:

Stefan Wildermann Project Leader Andreas Becher Project Member Daniel Ziener Project Member

Contributing FAU Organisations:

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)