Conference contribution


Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits


Publication Details
Author(s): Fey D, Reichenbach M, Söll C, Biglari M, Röber J, Weigel R
Publisher: Association for Computing Machinery
Publication year: 2016
Event: The International Symposium on Memory Systems (MEMSYS)
Event location: Washington, USA

Abstract

Signed-digit (SD) arithmetic exploits positive and negative digits what requires more than two states. It is long known that using trits, which store in each digit not only 0 and 1 but in addition either 2 or -1, can carry out an addition in a constant number of steps independent of the used operands' word length. However, corresponding SD arithmetic circuits have not been used in current processors so far due to the missing of fast, dense and CMOS compatible memory cells that can store reliably multiple levels. Memristors offer these features making necessary a re-evaluation of different SD number representations and their corresponding arithmetic circuits realized in CMOS technology. In addition appropriate analog-to-digital and digital-to-analog interfaces between digital CMOS circuits and multi-bit storing memristors are necessary and therefore are considered in this investigation, too. The paper evaluates different SD adders which differ both in the number of used storing levels, in the number of required CMOS logic gates, and in the number of necessary elementary computation steps. It is concluded by an synthesis investigation that an SD addition using trits, stored in memristors, and three elementary processing steps reduces the latency for a word length of 16 digits about 19\% and about 52\% for a word length of 512 digits compared to a binary carry-look-ahead (CLA) adder. Furthermore, it is shown that for double and long format operands stored in register based memristors a better energy-delay product is achieved as in a CLA adder. The results are partially found from ascertained chip layouts of hybrid CMOS / memristor circuits, which combine CMOS logic and multi-level storage devices like memristors in one integrated circuit.



How to cite
APA: Fey, D., Reichenbach, M., Söll, C., Biglari, M., Röber, J., & Weigel, R. (2016). Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits. Washington, USA: Association for Computing Machinery.

MLA: Fey, Dietmar, et al. "Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits." Proceedings of the The International Symposium on Memory Systems (MEMSYS), Washington, USA Association for Computing Machinery, 2016.

BibTeX: Download
Share link
Last updated on 2017-10-16 at 03:47
PDF downloaded successfully