Conference contribution


Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-Core Processor


Publication Details
Author(s): Salcic Z, Nadeem M, Park H, Teich J
Publication year: 2016
Conference Proceedings Title: Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16)
Pages range: 233-240

Event details
Event: 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16)
Event location: Lyon
Start date of the event: 21/09/2016
End date of the event: 23/09/2016



How to cite
APA: Salcic, Z., Nadeem, M., Park, H., & Teich, J. (2016). Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-Core Processor. In Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16) (pp. 233-240). Lyon, FR.

MLA: Salcic, Zoran, et al. "Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-Core Processor." Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16), Lyon 2016. 233-240.

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