Conference contribution


Real-Time Range Image Preprocessing on FPGAs


Publication Details
Author(s): Schmid M, Blocherer M, Hannig F, Teich J
Title edited volumes: 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013
Publisher: IEEE Computer Society
Publication year: 2013
Conference Proceedings Title: Proc. International Conference on Reconfigurable Computing and FPGAs
Pages range: 1-8

Event details
Event: International Conference on Reconfigurable Computing and FPGAs (ReConFig)
Event location: Cancun
Start date of the event: 09/12/2013
End date of the event: 11/12/2013

Abstract

Unprocessed range images acquired by some range sensing modality often show bumpy surfaces and distorted object boundaries, complicating post processing, such as 3D-registration and feature extraction. The effects are mostly caused by noise due to sensor limitations, but can be mitigated through applying image processing techniques, as for example defect pixel interpolation, bilateral temporal averaging, and edge-preserving noise filtering. In this work, we present an approach to perform preprocessing of range images on field programmable gate arrays (FPGAs) using single precision floating point arithmetic. Moreover, we present an FPGA infrastructure, including image acquisition from a host computer via PCI express. Although this work is based on range images obtained from a Microsoft Kinect range sensing camera, the presented approach is applicable to modalities for range image acquisition, in general. The proposed image processing pipeline can be run at 150MHz for VGA-resolution images and imposes a latency close to 2 ms. © 2013 IEEE.



How to cite
APA: Schmid, M., Blocherer, M., Hannig, F., & Teich, J. (2013). Real-Time Range Image Preprocessing on FPGAs. In Proc. International Conference on Reconfigurable Computing and FPGAs (pp. 1-8). Cancun, MX: IEEE Computer Society.

MLA: Schmid, Moritz, et al. "Real-Time Range Image Preprocessing on FPGAs." Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun IEEE Computer Society, 2013. 1-8.

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