Conference contribution


Stress-Aware Module Placement on Reconfigurable Devices


Publication Details
Author(s): Angermeier J, Ziener D, Glaß M, Teich J
Title edited volumes: Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Publisher: IEEE Computer Society
Publishing place: New York, NY, USA
Publication year: 2011
Conference Proceedings Title: Proceedings of the International Conference on Field-Programmable Logic and Applications
Pages range: 277-281
ISBN: 978-1-4577-1484-9

Event details
Event: International Conference on Field Programmable Logic and Applications (FPL'11)
Event location: Chania, Crete
Start date of the event: 05/09/2011
End date of the event: 07/09/2011

Abstract

A lot of research has been spent on improving the reliability and extending the lifetime of ASIC and SoC devices, but only little on improving the long-term reliability of dynamically reconfigurable systems. In order to increase the lifetime of a reconfigurable device, we propose a placement strategy to distribute the stress equally on the reconfigurable resources at runtime such that all have a similar level of degradation. Thereby, we present a new aging model which is applied to estimate the influence of aging effects on dynamically reconfigurable devices, and which can be evaluated at runtime, while providing quite accurate aging results. Furthermore, we present a new stress-aware placement algorithm that takes the degradation of the reconfigurable resources into account and can significantly extend the lifetime of reconfigurable devices. © 2011 IEEE.



How to cite
APA: Angermeier, J., Ziener, D., Glaß, M., & Teich, J. (2011). Stress-Aware Module Placement on Reconfigurable Devices. In Proceedings of the International Conference on Field-Programmable Logic and Applications (pp. 277-281). Chania, Crete, GR: New York, NY, USA: IEEE Computer Society.

MLA: Angermeier, Josef, et al. "Stress-Aware Module Placement on Reconfigurable Devices." Proceedings of the International Conference on Field Programmable Logic and Applications (FPL'11), Chania, Crete New York, NY, USA: IEEE Computer Society, 2011. 277-281.

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