Sonderforschungsbereich/Transregio 89 Invasives Rechnen

Address:
Am Weichselgarten 3
91058 Erlangen


Subordinate Organisational Units


Publications (Download BibTeX)
1 of 2

Journal article
Zaib A, Heisswolf J, Weichslgartner A, et al. (2017)
Efficient Task Spawning for Shared Memory and Message Passing in Many-core Architectures
Journal of Systems Architecture

Conference contribution
Roloff S, Hannig F, Teich J - Ed.: ACM (2017)
High Performance Network-on-Chip Simulation by Interval-based Timing Predictions
Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia)

Conference contribution
Pourmohseni B, Wildermann S, Glaß M, et al. (2017)
Predictable Run-Time Mapping Reconfiguration for Real-Time Applications on Many-Core Systems
Real-Time Networks and Systems (RTNS)

Conference contribution
Brand M, Hannig F, Tanase AP, et al. (2017)
Orthogonal Instruction Processing: An Alternative to Lightweight VLIW Processors
2017 IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip

Conference contribution
Brand M, Hannig F, Tanase AP, et al. - Ed.: IEEE (2017)
Efficiency in ILP Processing by Using Orthogonality
2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP)

Journal article
Khdr H, Pagani S, Sousa É, et al. (2017)
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores
IEEE Transactions on Computers

Conference contribution
Roloff S, Pöppl A, Schwarzer T, et al. (2016)
ActorX10: An Actor Library for X10
Proceedings of the 6th ACM SIGPLAN X10 Workshop (X10)

Conference contribution
Weichslgartner A, Wildermann S, Götzfried J, et al. (2016)
Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs
In Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES)

Conference contribution
Witterauf M, Tanase AP, Hannig F, et al. (2016)
Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays
Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)

Conference contribution
Würstlein A, Gernoth M, Götzfried J, et al. (2016)
Exzess: Hardware-based RAM encryption against physical memory disclosure
29th International Conference on Architecture of Computing Systems, ARCS 2016

Article in Edited Volumes
Lari V (2016)
Invasive Tightly Coupled Processor Arrays
Springer book series on Computer Architecture and Design Methodologies

Conference contribution
Teich J, Glaß M, Roloff S, et al. (2016)
Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution using Invasive Computing
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16)

Journal article
Lari V, Weichslgartner A, Tanase AP, et al. (2016)
Providing Fault Tolerance Through Invasive Computing
it - Information Technology

Journal article
Drescher G, Erhardt C, Freiling F, et al. (2016)
Providing security on demand using invasive computing
it - Information Technology

Conference contribution
Fickenscher J, Reiche O, Schlumberger J, et al. (2016)
Modeling, Programming and Performance Analysis of Automotive Environment Map Representations on Embedded GPUs
Proceedings of the 18th IEEE International High-Level Design Validation and Test Workshop (HLDVT)

Journal article
Paul J, Stechele W, Oechslein B, et al. (2015)
Resource-awareness on heterogeneous MPSoCs for image processing
Journal of Systems Architecture

Article in Edited Volumes
Teich J, Boppu S, Hannig F, et al. - Ed.: Luk, Wayne, Constantinides, et al. (2015)
Compact Code Generation and Throughput Optimization for Coarse-Grained Reconfigurable Arrays
Transforming Reconfigurable Systems: A Festschrift Celebrating the 60th Birthday of Professor Peter Cheung

Conference contribution
Tanase AP, Witterauf M, Hannig F, et al. (2015)
Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays
Proceedings of the 13th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)

Conference contribution
Lari V, Tanase AP, Teich J, et al. (2015)
A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems

Conference contribution
Witterauf M, Tanase AP, Teich J, et al. (2015)
Adaptive fault tolerance through invasive computing
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems



Additional related publications

Conference contribution
Reiche O, Kobylko C, Hannig F, et al. - Ed.: ACM (2017)
Auto-vectorization for Image Processing DSLs
Proceedings of the 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES)

Conference contribution
Reiche O, Özkan MA, Membarth R, et al. - Ed.: IEEE (2017)
Generating FPGA-based Image Processing Accelerators with Hipacc
Proceedings of the International Conference On Computer Aided Design

Conference contribution
Götzfried J, Müller T, Drescher G, et al. (2016)
RamCrypt: Kernel-based Address Space Encryption for User-mode Processes
11th ACM Asia Conference on Computer and Communications Security

Journal article
Hannig F, Lari V, Boppu S, et al. (2014)
Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach
ACM Transactions on Embedded Computing Systems

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