Employing Polyhedral Methods to Optimize Stencils on FPGAs with Stencil-specific Caches, Data Reuse, and Wide Data Bursts

Mayer F, Brandner J, Philippsen M (2024)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2024

Pages Range: 12p

Event location: München DE

URI: https://impact-workshop.org/impact2024/#mayer24-fpgas

DOI: 10.48550/arXiv.2401.13645

Open Access Link: https://impact-workshop.org/impact2024/papers/paper6.pdf

Abstract

It s well known that to accelerate stencil codes on CPUs or GPUs and to exploit hardware caches and their lines optimizers must find spatial and temporal locality of array accesses to harvest data-reuse opportunities. On FPGAs there is the burden that there are no built-in caches (or only pre-built hardware descriptions for cache blocks that are inefficient for stencil codes). But this paper demonstrates that this lack is also a chance as polyhedral methods can be used to generate stencil-specific cache-structures of the right sizes on the FPGA and to fill and flush them efficiently with wide bursts during stencil execution. The paper shows how to derive the appropriate directives and code restructurings from stencil codes so that the FPGA compiler generates fast stencil hardware. Switching on our optimization improves the runtime of a set of 10 stencils by between 43× and 156×.

Authors with CRIS profile

Florian Mayer Lehrstuhl für Informatik 2 (Programmiersysteme) Julian Brandner Lehrstuhl für Informatik 2 (Programmiersysteme) Michael Philippsen Lehrstuhl für Informatik 2 (Programmiersysteme)

Related research project(s)

OpenMP for reconfigurable heterogenous architectures (ORKA) OpenMP für rekonfigurierbare heterogene Architekturen Nov. 1, 2017 - Dec. 31, 2023

How to cite

APA:

Mayer, F., Brandner, J., & Philippsen, M. (2024). Employing Polyhedral Methods to Optimize Stencils on FPGAs with Stencil-specific Caches, Data Reuse, and Wide Data Bursts. In Proceedings of the 14th International Workshop on Polyhedral Compilation Techniques, (IMPACT 2024, in conjunction with HiPEAC 2024) (pp. 12p). München, DE.

MLA:

Mayer, Florian, Julian Brandner, and Michael Philippsen. "Employing Polyhedral Methods to Optimize Stencils on FPGAs with Stencil-specific Caches, Data Reuse, and Wide Data Bursts." Proceedings of the 14th International Workshop on Polyhedral Compilation Techniques, (IMPACT 2024, in conjunction with HiPEAC 2024), München 2024. 12p.

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