A Synchronized 35 GHz Divide-by-5 TSPC Flip-Flop Clock Divider in 22 nm FDSOI

Probst F, Engelmann A, Weigel R (2023)

Publication Status: Accepted

Publication Type: Conference contribution, Conference Contribution

Future Publication Type: Conference contribution

Publication year: 2023

Pages Range: 212-214

Event location: Taipei TW

URI: https://ieeexplore.ieee.org/document/10439729/references#references

DOI: 10.1109/APMC57107.2023.10439729

Authors with CRIS profile

Florian Probst Lehrstuhl für Technische Elektronik (LTE) Andre Engelmann Lehrstuhl für Technische Elektronik (LTE) Robert Weigel Lehrstuhl für Technische Elektronik (LTE)

Additional Organisation(s)

FAU Profilzentrum Licht.Materie.Quantentechnologien (FAU LMQ)

Related research project(s)

Radarsysteme bei 140 GHz in 22 nm FDSOI CMOS für genaue Gestenerkennung mit kompakten Abmessungen, hoher Energieeffizienz und digitaler Signalgenerierung (ForMikro-REGGAE) Oct. 1, 2019 - June 30, 2024

How to cite

APA:

Probst, F., Engelmann, A., & Weigel, R. (2023). A Synchronized 35 GHz Divide-by-5 TSPC Flip-Flop Clock Divider in 22 nm FDSOI. In Proceedings of the 2023 Asia-Pacific Microwave Conference (APMC) (pp. 212-214). Taipei, TW.

MLA:

Probst, Florian, Andre Engelmann, and Robert Weigel. "A Synchronized 35 GHz Divide-by-5 TSPC Flip-Flop Clock Divider in 22 nm FDSOI." Proceedings of the 2023 Asia-Pacific Microwave Conference (APMC), Taipei 2023. 212-214.

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