Multipurpose Cacheing to Accelerate OpenMP Target Regions on FPGAs (Best Paper Award)

Brandner J, Mayer F, Philippsen M (2023)


Publication Language: English

Publication Type: Conference contribution, Original article

Publication year: 2023

Journal

Publisher: Springer Science and Business Media Deutschland GmbH

Series: Springer’s Lecture Notes in Computer Science (LNCS)

Book Volume: 14114

Pages Range: 147-162

Conference Proceedings Title: OpenMP: Advanced Task-Based, Device and Compiler Programming

Event location: Bristol, GBR

ISBN: 9783031407437

DOI: 10.1007/978-3-031-40744-4_10

Abstract

While FPGAs can offer great throughput and energy efficiency, when offloading OpenMP target regions to them the memory bandwidth often limits the ability to exploit their potential. As a remedy, our OpenMP-to-FPGA compiler fully automatically inserts optimized multipurpose cache blocks into the generated FPGA hardware. We exploit characteristics of OpenMP target regions to both avoid costly bus snooping hardware and to achieve cache consistency. On a diverse set of benchmarks with data reuse the caches reduce the runtime by 43 % on average, while only consuming slightly more FPGA resource.

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How to cite

APA:

Brandner, J., Mayer, F., & Philippsen, M. (2023). Multipurpose Cacheing to Accelerate OpenMP Target Regions on FPGAs (Best Paper Award). In Simon McIntosh-Smith, Tom Deakin, Michael Klemm, Bronis R. de Supinski, Jannis Klinkenberg (Eds.), OpenMP: Advanced Task-Based, Device and Compiler Programming (pp. 147-162). Bristol, GBR: Springer Science and Business Media Deutschland GmbH.

MLA:

Brandner, Julian, Florian Mayer, and Michael Philippsen. "Multipurpose Cacheing to Accelerate OpenMP Target Regions on FPGAs (Best Paper Award)." Proceedings of the Proceedings of the 19th International Workshop on OpenMP, IWOMP 2023, Bristol, GBR Ed. Simon McIntosh-Smith, Tom Deakin, Michael Klemm, Bronis R. de Supinski, Jannis Klinkenberg, Springer Science and Business Media Deutschland GmbH, 2023. 147-162.

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