A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI
Engelmann A, Probst F, Hetterle P, Weigel R (2024)
Publication Language: English
Publication Status: Accepted
Publication Type: Unpublished / Preprint
Future Publication Type: Conference contribution
Publication year: 2024
Event location: Taipe
Abstract
This work presents a compact and energy-saving D-band frequency multiplier by 4 (quadrupler) integrated into an advanced 22nm fully-depleted silicon-on-insulator (FDSOI) technology. The circuit consists of a multi-phase driven two-stage push-push doubler architecture achieving a conversion gain of -1 dB and covers a bandwidth of 23 GHz centered at 133 GHz. At 0.8V supply voltage, the quadrupler attains a maximum output power of -3.4dBm and an efficiency of 1.71% while consuming only 27mW of DC power. A harmonic rejection greater than 26 dBc is reached over the entire bandwidth. The core cell of the circuit occupies a compact chip area of 325x250 μm2.
Authors with CRIS profile
Andre Engelmann
Lehrstuhl für Technische Elektronik
Florian Probst
Lehrstuhl für Technische Elektronik
Philip Hetterle
Lehrstuhl für Technische Elektronik
Robert Weigel
Lehrstuhl für Technische Elektronik
Additional Organisation(s)
How to cite
APA:
Engelmann, A., Probst, F., Hetterle, P., & Weigel, R. (2024). A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI. (Unpublished, Accepted).
MLA:
Engelmann, Andre, et al. A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI. Unpublished, Accepted. 2024.
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