Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA
Kenter T, Shambhu A, Faghih-Naini S, Aizinger V (2021)
Publication Type: Conference contribution
Publication year: 2021
Publisher: Association for Computing Machinery, Inc
Conference Proceedings Title: Proceedings of the Platform for Advanced Scientific Computing Conference, PASC 2021
Event location: Online
ISBN: 9781450385633
Abstract
We present the first FPGA implementation of the full simulation pipeline of a shallow water code based on the discontinuous Galerkin method. Using OpenCL and following an algorithm-hardware codesign approach, the software reference is transformed into a dataflow architecture that can process a full mesh element per clock cycle. The novel projection approach on the algorithmic level complements the pipeline and memory optimizations in the hardware design. With this, the FPGA kernels for different polynomial orders outperform the CPU reference by 43x - 144x in a strong scaling benchmark scenario. A performance model can explain the measured FPGA performance of up to 717 GFLOPs accurately.
Authors with CRIS profile
Sara Faghih-Naini
Lehrstuhl für Informatik 10 (Systemsimulation)
Vadym Aizinger
Professur für Angewandte Mathematik (Wissenschaftliches Rechnen)
How to cite
APA:
Kenter, T., Shambhu, A., Faghih-Naini, S., & Aizinger, V. (2021). Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA. In Proceedings of the Platform for Advanced Scientific Computing Conference, PASC 2021. Online, CH: Association for Computing Machinery, Inc.
MLA:
Kenter, Tobias, et al. "Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA." Proceedings of the 2021 Platform for Advanced Scientific Computing Conference, PASC 2021, Online Association for Computing Machinery, Inc, 2021.
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