Integration of wet-etched GaN nanowires for vertical power transistors

Yu F, Yao S, Römer F, Witzigmann B, Wasisto HS, Waag A (2016)

Publication Type: Conference contribution

Publication year: 2016

Publisher: VDE Verlag GmbH

Pages Range: 167-170

Conference Proceedings Title: Mikro-Nano-Integration - 6. GMM-Workshops

Event location: Duisburg DE

ISBN: 9783800742783

Abstract

A top-down fabrication approach of GaN vertical transistors through integrating vertically aligned nanowires (NWs) has been reported here. By employing wet chemical etching, NWs with smooth a-plane sidewalls as well as special mushroom-like geometry are realized. The diameter of NWs can be controlled to be as small as 50 nm and their aspect ratio can reach up to 60. A fabricated transistor, integrating 99 NWs, exhibits enhancement-mode (E-mode) operation with a threshold voltage of 1.5 V, a high on and off current ratio of 109, a small subthreshold swing of 67 mV/Dec, and a high drain current (Id) output of Id > 10 mA, indicating that such vertical GaN devices are promising for future candidate in power electronics.

Authors with CRIS profile

Bernd Witzigmann

Involved external institutions

Technische Universität Braunschweig DE Germany (DE) Universität Kassel DE Germany (DE)

How to cite

APA:

Yu, F., Yao, S., Römer, F., Witzigmann, B., Wasisto, H.S., & Waag, A. (2016). Integration of wet-etched GaN nanowires for vertical power transistors. In Mikro-Nano-Integration - 6. GMM-Workshops (pp. 167-170). Duisburg, DE: VDE Verlag GmbH.

MLA:

Yu, Feng, et al. "Integration of wet-etched GaN nanowires for vertical power transistors." Proceedings of the 6. GMM-Workshops Mikro-Nano-Integration - 6th GMM Workshop on Micro-Nano-Integration, Duisburg VDE Verlag GmbH, 2016. 167-170.

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