Fast DC-link capacitor design for Voltage Source Inverters based on weighted total harmonic distortion
Rettner C, Schiedermeier M, Apelsmeier A, März M (2020)
Publication Type: Conference contribution
Publication year: 2020
Publisher: Institute of Electrical and Electronics Engineers Inc.
Book Volume: 2020-March
Pages Range: 3520-3526
Conference Proceedings Title: Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Event location: New Orleans, LA
ISBN: 9781728148298
DOI: 10.1109/APEC39645.2020.9124581
Abstract
Computationally very expensive circuit simulations are required to design the dc-link capacitance for automotive traction voltage source inverters. Thereby, the dc-link voltage ripple is, in contrast to grid connected inverters, the predominant dc-link capacitor design parameter in automotive inverters. In order to achieve minimal capacitance size, the operating point of maximal voltage ripple of any applied modulation strategy has to be detected. This research proposes an optimized dc-link capacitance design approach based on the weighted total harmonic distortion of the dc-link current, which reduces the overall simulation time from several days to a few minutes.
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How to cite
APA:
Rettner, C., Schiedermeier, M., Apelsmeier, A., & März, M. (2020). Fast DC-link capacitor design for Voltage Source Inverters based on weighted total harmonic distortion. In Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC (pp. 3520-3526). New Orleans, LA, US: Institute of Electrical and Electronics Engineers Inc..
MLA:
Rettner, Cornelius, et al. "Fast DC-link capacitor design for Voltage Source Inverters based on weighted total harmonic distortion." Proceedings of the 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020, New Orleans, LA Institute of Electrical and Electronics Engineers Inc., 2020. 3520-3526.
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