Efficient Parallel Reduction on GPUs with Hipacc

Qiao B, Reiche O, Özkan MA, Teich J, Hannig F (2020)


Publication Language: English

Publication Type: Conference contribution, Original article

Publication year: 2020

Pages Range: 58-61

Conference Proceedings Title: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES)

Event location: Sankt Goar DE

ISBN: 978-1-4503-7131-5/20/05

DOI: 10.1145/3378678.3391885

Abstract

Hipacc is a domain-specific language for ease of programming image processing applications on hardware accelerators such as GPUs. It relieves the burden of manually porting algorithms to hardware for developers with the help of domain- and architecture-specific knowledge. One fundamental operation in image processing is reduction. Global reduction operators are the building blocks of many widely used algorithms, including image normalization, similarity estimation, etc. This paper presents an efficient approach to perform parallel reductions on GPUs with Hipacc. Our proposed approach benefits from the continuous effort of performance and programmability improvement by hardware vendors, for example, by utilizing the latest low-level primitives from Nvidia. Results show our approach achieves a speedup of up to 3.43 over an existing Hipacc implementation with traditional optimization methods, and a speedup of up to 9.02 over an implementation using the Thrust library from Nvidia.

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How to cite

APA:

Qiao, B., Reiche, O., Özkan, M.A., Teich, J., & Hannig, F. (2020). Efficient Parallel Reduction on GPUs with Hipacc. In Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 58-61). Sankt Goar, DE.

MLA:

Qiao, Bo, et al. "Efficient Parallel Reduction on GPUs with Hipacc." Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES), Sankt Goar 2020. 58-61.

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