Design considerations for robust manufacturing and high yield of 1.2 kv 4H-SIC VDMOS transistors

Schlichting H, Sledziewski T, Bauer AJ, Erlbacher T (2019)

Publication Type: Conference contribution

Publication year: 2019

Journal

Materials Science Forum Trans Tech Publications

Publisher: Trans Tech Publications Ltd

Book Volume: 963 MSF

Pages Range: 763-767

Conference Proceedings Title: Materials Science Forum

Event location: Birmingham GB

ISBN: 9783035713329

DOI: 10.4028/www.scientific.net/MSF.963.763

Abstract

Production yield is a major factor for semiconductor device manufacturing. To produce high performance devices cost efficiently, it is important to know the process windows of the implemented production technology. This can influence the yield in different ways. One of the critical steps is the photolithography. In this work the impact of misalignment within the technological limits is analyzed and discussed. 4H-SiC VDMOS Transistors were produced and the electrical characteristics were compared with the overlay accuracy of the devices. Small change in channel length can lead to large impact on the electrical characteristic. Especially when the channel length reaches values near to the critical length for short channel effects (SCEs), small overlay inaccuracies influence the electrical characteristic of the devices in an increasing manner. Different cell designs were analyzed regarding their robustness to misalignment.

Authors with CRIS profile

Holger Schlichting Lehrstuhl für Elektronische Bauelemente Tobias Erlbacher Lehrstuhl für Elektronische Bauelemente

Involved external institutions

Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie (IISB) DE Germany (DE)

How to cite

APA:

Schlichting, H., Sledziewski, T., Bauer, A.J., & Erlbacher, T. (2019). Design considerations for robust manufacturing and high yield of 1.2 kv 4H-SIC VDMOS transistors. In Peter M. Gammon, Vishal A. Shah, Richard A. McMahon, Michael R. Jennings, Oliver Vavasour, Philip A. Mawby, Faye Padfield (Eds.), Materials Science Forum (pp. 763-767). Birmingham, GB: Trans Tech Publications Ltd.

MLA:

Schlichting, Holger, et al. "Design considerations for robust manufacturing and high yield of 1.2 kv 4H-SIC VDMOS transistors." Proceedings of the 12th European Conference on Silicon Carbide and Related Materials, ECSCRM 2018, Birmingham Ed. Peter M. Gammon, Vishal A. Shah, Richard A. McMahon, Michael R. Jennings, Oliver Vavasour, Philip A. Mawby, Faye Padfield, Trans Tech Publications Ltd, 2019. 763-767.

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