A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS

Ciocoveanu R, Weigel R, Hagelauer AM, Issakov V (2019)

Publication Language: English

Publication Status: Accepted

Publication Type: Conference contribution, Conference Contribution

Future Publication Type: Conference contribution

Publication year: 2019

Event location: Orlando, FL US

DOI: 10.1109/sirf.2019.8709143

Abstract

This paper presents a 60GHz highly efficient single-stage differential stacked Class AB power amplifier (PA) with second harmonic control. The circuit has been realized in a 45 nm PD-SOI CMOS technology. Measurement results show that the power amplifier achieves a maximum output power (Pmax) of 15.3dBm with a competitive maximum power-added efficiency (PAEmax) of 30.5% at 60 GHz. The output-referred 1-dB compression point (OP1dB) is 9.5 dBm. Furthermore, the circuit draws 40mA from a 1.8V supply and the chip core size is 0.36mm x 0.35 mm.

Authors with CRIS profile

Radu Ciocoveanu Lehrstuhl für Technische Elektronik Robert Weigel Lehrstuhl für Technische Elektronik Amelie Marietta Hagelauer Lehrstuhl für Technische Elektronik

Involved external institutions

Infineon Technologies AG DE Germany (DE)

How to cite

APA:

Ciocoveanu, R., Weigel, R., Hagelauer, A.M., & Issakov, V. (2019). A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS. In Proceedings of the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. Orlando, FL, US.

MLA:

Ciocoveanu, Radu, et al. "A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS." Proceedings of the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Orlando, FL 2019.

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