Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs

Beitrag bei einer Tagung
(Originalarbeit)


Details zur Publikation

Autor(en): Echavarria Gutiérrez JA, Schütz K, Becher A, Wildermann S, Teich J
Jahr der Veröffentlichung: 2018
Sprache: Englisch


Abstract

Approximate computing allows to tackle conflicting objectives, such as power and accuracy of computations. In this paper we first describe how knowledge of stimuli's specific features can help in quantifying and improving power savings by means of approximate computing. We investigate FPGA implementations of several approximate circuits and compare their power consumption with non-approximating versions. In particular, we study approximate arithmetics and a clock-gate based technique called memoization. Moreover, we compare the accuracy of estimation techniques for power consumption evaluation versus real measurements under controlled environments. We also experimentally quantify the relationship between switching activity and power consumption. Two important results are concluded from our investigations: (1) Approximate arithmetics do not necessarily consume less power than conventional circuits, whereas memoization techniques can in fact reduce power consumption. (2) Simulation-based power evaluation for approximate FPGA implementations can reach fidelity values up to about 90% in input-dependent power characteristics. Yet, to evaluate absolute savings, measurements are needed.


FAU-Autoren / FAU-Herausgeber

Becher, Andreas
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Echavarria Gutiérrez, Jorge Alfonso
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Wildermann, Stefan Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Zitierweisen

APA:
Echavarria Gutiérrez, J.A., Schütz, K., Becher, A., Wildermann, S., & Teich, J. (2018). Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs. Swissôtel Bremen, DE.

MLA:
Echavarria Gutiérrez, Jorge Alfonso, et al. "Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs." Proceedings of the AxC18: 3rd Workshop on Approximate Computing, Swissôtel Bremen 2018.

BibTeX: 

Zuletzt aktualisiert 2018-03-05 um 14:53