Buildabong: A framework for architecture/compiler co-exploration for ASIPs

Beitrag in einer Fachzeitschrift
(Originalarbeit)


Details zur Publikation

Autor(en): Fischer D, Teich J, Thies M, Weper R
Zeitschrift: Journal of Circuits Systems and Computers
Verlag: World Scientific Publishing
Jahr der Veröffentlichung: 2003
Band: 12
Heftnummer: 3
Seitenbereich: 353-375
ISSN: 0218-1266


Abstract


With the term Architecture/Compiler Co-exploration, we denote the problem of simultaneously optimizing an application-specific instruction set processor (ASIP) architecture as well as its generated compiler. In this paper, we characterize the design space of both compiler frontend (intermediate code optimization) and backend (changes of the machine model) and present the workflow of our framework BUILDABONG. The project consists of four phases: (a) architecture entry and composition, (b) automatic simulator generation, (c) compiler generation (in particular, retargeting), and (d) automatic architecture/compiler design space exploration. We demonstrate the feasibility of our approach by a detailed case study.



FAU-Autoren / FAU-Herausgeber

Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Autor(en) der externen Einrichtung(en)
Universität Paderborn


Zitierweisen

APA:
Fischer, D., Teich, J., Thies, M., & Weper, R. (2003). Buildabong: A framework for architecture/compiler co-exploration for ASIPs. Journal of Circuits Systems and Computers, 12(3), 353-375. https://dx.doi.org/10.1142/S0218126603000799

MLA:
Fischer, Dirk, et al. "Buildabong: A framework for architecture/compiler co-exploration for ASIPs." Journal of Circuits Systems and Computers 12.3 (2003): 353-375.

BibTeX: 

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