Efficient approximately-timed performance modeling for architectural exploration of MPSoCs

Streubühr M, Gladigau J, Haubelt C, Teich J (2009)


Publication Status: Published

Publication Type: Conference contribution, Conference Contribution

Publication year: 2009

Article Number: 5404057

Conference Proceedings Title: Forum on specification and Design Languages 2009

Event location: Sophia Antipolis

ISBN: 9782953050417

URI: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=77951563792&origin=inward

Abstract

In this paper, we propose an efficient modeling approach that permits simulation-based performance evaluation of MPSoCs at Electronic System Level (ESL). The approach is based on a SystemC simulation framework and allows for evaluating timing effects from resource contention when mapping applications to MPSoC platforms. The abstraction level used for modeling timing corresponds to approximately-timed transaction level models. This allows for an accurate performance modeling, including temporal effects from preemptive processor scheduling and bus arbitration. However, in contrast to standard SystemC TLM, application mapping and platform models are configurable and, thus, enable design space exploration at ESL. We use a Motion-JPEG decoder application to illustrate and assess the benefits of the proposed approach.

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APA:

Streubühr, M., Gladigau, J., Haubelt, C., & Teich, J. (2009). Efficient approximately-timed performance modeling for architectural exploration of MPSoCs. In Forum on specification and Design Languages 2009. Sophia Antipolis.

MLA:

Streubühr, Martin, et al. "Efficient approximately-timed performance modeling for architectural exploration of MPSoCs." Proceedings of the 2009 Forum on Specification and Design Languages, FDL 2009, Sophia Antipolis 2009.

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