Designing Heterogeneous ECU Networks via Compact Architecture Encoding and Hybrid Timing Analysis

Glaß M, Lukasiewycz M, Teich J, Bordoloi U, Chakraborty S (2009)

Publication Type: Conference contribution

Publication year: 2009

Edited Volumes: Proceedings - Design Automation Conference

Pages Range: 43-46

Conference Proceedings Title: Proc. 2009 ACM/EDAC/IEEE Design Automation Conference

Event location: San Francisco US

Abstract

In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies a number of design steps, i.e., resource allocation, process binding, message routing, scheduling, and parameter estimation for the processor and bus schedulers, and (ii) a hybrid scheme that allows different timing analysis techniques to be applied to different bus protocols (viz., CAN and FlexRay) within the same architecture in order to derive global performance estimates such as end-to-end delays of messages. The use of the compact encoding technique substantially reduces the underlying search space, and the hybrid timing analysis scheme allows the combination of known timing analysis techniques from the real-time systems domain. The proposed techniques were combined into a tool-chain and a real-life case study to illustrate their advantages. Copyright 2009 ACM.

Authors with CRIS profile

Michael Glaß Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Involved external institutions

Linköping University SE Sweden (SE) Technische Universität München (TUM) DE Germany (DE)

How to cite

APA:

Glaß, M., Lukasiewycz, M., Teich, J., Bordoloi, U., & Chakraborty, S. (2009). Designing Heterogeneous ECU Networks via Compact Architecture Encoding and Hybrid Timing Analysis. In Proc. 2009 ACM/EDAC/IEEE Design Automation Conference (pp. 43-46). San Francisco, US.

MLA:

Glaß, Michael, et al. "Designing Heterogeneous ECU Networks via Compact Architecture Encoding and Hybrid Timing Analysis." Proceedings of the ACM/EDAC/IEEE Design Automation Conference (DAC'09), San Francisco 2009. 43-46.

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