Buffer Memory Optimization in DSP Applications - An Evolutionary Approach

Beitrag in einem Sammelwerk


Details zur Publikation

Autor(en): Bhattacharyya SS, Teich J, Zitzler E
Titel Sammelwerk: Parallel Problem Solving from Nature (PPSN'98)
Verlag: Springer-verlag
Verlagsort: Amsterdam, The Netherlands
Jahr der Veröffentlichung: 1998
Seitenbereich: 292-301
ISBN: 3540650784
ISSN: 0302-9743


Abstract


In the context of digital signal processing, synchronous data flow (SDF) graphs [12] are widely used for specification. For these, so called single appearance schedules provide program memory-optimal uniprocessor implementations. Here, buffer memory minimized schedules are explored among these using an Evolutionary Algorithm (EA). Whereas for a restricted class of graphs, there exist optimal polynomial algorithms, these are not exact and may provide poor results when applied to arbitrary, i.e., randomly generated graphs. We show that a careful EA implementation may outperform these algorithms by sometimes orders of magnitude.



FAU-Autoren / FAU-Herausgeber

Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Autor(en) der externen Einrichtung(en)
University of Maryland


Zitierweisen

APA:
Bhattacharyya, S.S., Teich, J., & Zitzler, E. (1998). Buffer Memory Optimization in DSP Applications - An Evolutionary Approach. In Parallel Problem Solving from Nature (PPSN'98) (pp. 292-301). Amsterdam, The Netherlands: Springer-verlag.

MLA:
Bhattacharyya, Shuvra S., Jürgen Teich, and Eckart Zitzler. "Buffer Memory Optimization in DSP Applications - An Evolutionary Approach." Parallel Problem Solving from Nature (PPSN'98) Amsterdam, The Netherlands: Springer-verlag, 1998. 292-301.

BibTeX: 

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