A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs

Zebelein C, Falk J, Haubelt C, Teich J (2012)

Publication Status: Published

Publication Type: Conference contribution, Conference Contribution

Publication year: 2012

Pages Range: 17-22

Article Number: 6240591

Event location: San Francisco, CA US

ISBN: 9782953998719

URI: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84866155902&origin=inward

Abstract

High-level synthesis tools are gaining more and more acceptance in industrial design flows. While they increase productivity in implementing a single complex hardware module, synthesizing and optimizing many hardware components simultaneously is still an open problem. In particular, resource sharing is typically only performed for single components, thereby neglecting optimization possibilities across concurrent modules. On the other hand, domain-specific models and specifications, which are generally seen as a key ingredient to raise the level of abstraction in future design flows, may enable such global optimizations. In this paper, we present a model-based approach for inter-process resource sharing which provides for efficient high-level synthesis of streaming applications modeled as a set of communicating processes. The applicability of the proposed approach is validated by a case study. © 2012 ECSI.

Authors with CRIS profile

Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

SysteMoC: Representing models of computation in SystemC (SysteMoC) April 1, 2005 - April 1, 2008 SystemCoDesigner: System level design space exploration for embedded systems (SystemCoDesigner) April 1, 2005 - April 1, 2008

Involved external institutions

Universität Rostock DE Germany (DE)

How to cite

APA:

Zebelein, C., Falk, J., Haubelt, C., & Teich, J. (2012). A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs. In Proceedings of the 2nd Electronic System Level Synthesis Conference, ESLsyn 2012 (pp. 17-22). San Francisco, CA, US.

MLA:

Zebelein, Christian, et al. "A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs." Proceedings of the 2nd Electronic System Level Synthesis Conference, ESLsyn 2012, San Francisco, CA 2012. 17-22.

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