A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs

Beitrag bei einer Tagung
(Konferenzbeitrag)


Details zur Publikation

Autor(en): Zebelein C, Falk J, Haubelt C, Teich J
Jahr der Veröffentlichung: 2012
Seitenbereich: 17-22
ISBN: 9782953998719


Abstract


High-level synthesis tools are gaining more and more acceptance in industrial design flows. While they increase productivity in implementing a single complex hardware module, synthesizing and optimizing many hardware components simultaneously is still an open problem. In particular, resource sharing is typically only performed for single components, thereby neglecting optimization possibilities across concurrent modules. On the other hand, domain-specific models and specifications, which are generally seen as a key ingredient to raise the level of abstraction in future design flows, may enable such global optimizations. In this paper, we present a model-based approach for inter-process resource sharing which provides for efficient high-level synthesis of streaming applications modeled as a set of communicating processes. The applicability of the proposed approach is validated by a case study. © 2012 ECSI.



FAU-Autoren / FAU-Herausgeber

Falk, Joachim
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Autor(en) der externen Einrichtung(en)
Universität Rostock


Zitierweisen

APA:
Zebelein, C., Falk, J., Haubelt, C., & Teich, J. (2012). A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs. (pp. 17-22). San Francisco, CA, US.

MLA:
Zebelein, Christian, et al. "A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs." Proceedings of the 2nd Electronic System Level Synthesis Conference, ESLsyn 2012, San Francisco, CA 2012. 17-22.

BibTeX: 

Zuletzt aktualisiert 2018-01-09 um 07:11