Interface Synthesis for FPGA Based VLSI Processor Arrays
Bednara M, Teich J (2002)
Publication Type: Conference contribution
Publication year: 2002
Conference Proceedings Title: Proc. of The International Conference on Engineering of Reconfigurable Sytsems and Algorithms
Event location: Las Vegas, Nevada
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APA:
Bednara, M., & Teich, J. (2002). Interface Synthesis for FPGA Based VLSI Processor Arrays. In Proc. of The International Conference on Engineering of Reconfigurable Sytsems and Algorithms. Las Vegas, Nevada, US.
MLA:
Bednara, Marcus, and Jürgen Teich. "Interface Synthesis for FPGA Based VLSI Processor Arrays." Proceedings of the The International Conference on Engineering of Reconfigurable Sytsems and Algorithms (ERSA02),, Las Vegas, Nevada 2002.
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