Kókai G, Frühauf HH, Xu F (2005)
Publication Language: English
Publication Type: Journal article, Original article
Publication year: 2005
Publisher: Inderscience Enterprises
Book Volume: 1
Pages Range: 50-64
Journal Issue: 1-2
In recent years there has been significant interest in the area of Hardware-based Genetic Algorithms (HGA) implemented using a Field Programmable Gate Array (FPGA). This paper presents a hardware-based genetic optimiser applied to adjusting an adaptive antennae receiver. The proposed architecture employs a combination of pipelining and parallelisation to achieve significant speedups over software implementation. The proposed HGA is implemented on a prototyping board with a Xilinx Virtex-E FPGA and reaches a speedup factor of more than 500 when compared to the software implementation.
APA:
Kókai, G., Frühauf, H.H., & Xu, F. (2005). Adaptive smart antennae receiver controlled by a hardware-based genetic optimiser. International Journal of Embedded Systems, 1(1-2), 50-64. https://dx.doi.org/10.1504/IJES.2005.008808
MLA:
Kókai, Gabriella, Hans Holm Frühauf, and Feng Xu. "Adaptive smart antennae receiver controlled by a hardware-based genetic optimiser." International Journal of Embedded Systems 1.1-2 (2005): 50-64.
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