Evolutionary Algorithms for the Synthesis of Embedded Software

Bhattacharyya SS, Teich J, Zitzler E (2000)


Publication Type: Journal article

Publication year: 2000

Journal

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

Book Volume: 8

Pages Range: 452-456

Journal Issue: 4

DOI: 10.1109/92.863627

Abstract

This paper addresses the problem of trading off between the minimization of program and data memory requirements of single-processor implementations of dataflow programs. Based on the formal model of synchronous dataflow (SDF) graphs, so-called single appearance schedules are known to be program-memory optimal. Among these schedules, buffer memory schedules are investigated and explored based on a two-step approach: 1) An evolutionary algorithm (EA) is applied to efficiently explore the (in general) exponential search space of actor firing orders; 2) For each order, the buffer costs are evaluated by applying a dynamic programming post-optimization step (GDPPO). This iterative approach is compared to existing heuristics for buffer memory optimization.

Authors with CRIS profile

Related research project(s)

Involved external institutions

How to cite

APA:

Bhattacharyya, S.S., Teich, J., & Zitzler, E. (2000). Evolutionary Algorithms for the Synthesis of Embedded Software. IEEE Transactions on Very Large Scale Integration (Vlsi) Systems, 8(4), 452-456. https://dx.doi.org/10.1109/92.863627

MLA:

Bhattacharyya, Shuvra S., Jürgen Teich, and Eckart Zitzler. "Evolutionary Algorithms for the Synthesis of Embedded Software." IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 8.4 (2000): 452-456.

BibTeX: Download